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Intel shows research for packing more computing power into chips

mgiannelis by mgiannelis
3 years ago
in Press Release
Reading Time: 2 mins read
0
Intel

Intel’s research groups have revealed work that will allow it to accelerate and shrink its computing systems over 10 years. There are several technologies that can stack components of the systems together.
The Intel Research Components Group presented their results in articles at an international conference held in San Francisco.

The Silicon Valley company wants to regain its leadership in manufacturing small and fast chips. It has been losing to competitors such as Samsung Electronics and Taiwan Semiconductor Manufacturing Co (TSMC), in recent years.

Intel CEO Pat Gelsinger has not yet revealed commercial plans to regain the lead by 2025. However, research on Saturday showed how Intel intends to compete beyond 2025.

Intel uses “chiplets” (or tiles) to pack more processing power into its chips. This is in contrast to creating chips as one piece of two-dimensional material.

Intel’s work has shown that it can connect 10x more tiles together, which means that you can stack more complicated tiles on top of each others.

Perhaps the greatest breakthrough was a research paper that demonstrated how to stack transistors, tiny switches that make up the basic building blocks of digital logic and can be stacked on top of each other.
Intel claims that the technology will allow for a 30% to 50% increase of transistors within a given area on a chip.

Chips have been getting faster for 50 years because of an increase in transistors.

In an interview with Reuters, Paul Fischer, Director and Senior Engineer at Intel’s Components Research Group said that stacking devices on top of one another is clearly a way to save space.

“We are reducing interconnect lengths, and actually saving energy. This makes it not only more economically efficient, but also more productive.

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